5 MHz, 10 MHz, 10.23 MHz,
10.24 MHz, 13 MHz, 75 MHz, 80 MHz, 100 MHz,1 GHz,
1.57542 GHz and 2.8 GHz.
5 MHz and 10 MHz
ULN oscillators at 5
MHz and 10 MHz are the easiest to manufacture.
Below is a plot of a CFS10B frequency standard supplied
to a satellite company. The frequency was 10 MHz.
Here we can see phase
noise of -112 dBc/Hz at a 1 Hz offset with a -168 dBc/Hz
It is possible to go as
low as -130 dBc/Hz at a 1 Hz offset and a -175 dBc/Hz
floor noise, but sadly not in the same oscillator
(unless a multiple oscillator design is used).
We achieve lower phase noise at close in offsets (1 and
10 Hz) but sacrifice phase noise at wider offsets (10
However, the plot below
is a compromise of good phase noise at close in and far
It is much harder to achieve ultra low phase noise at
other frequencies such as 80 MHz or 100 MHz. So
what we do in these cases is lock a fundamental 100 MHz
oscillator with average phase noise, to a ULN 10 MHz
oscillator. The 10 MHz reference provides the 100
MHz accuracy and low ageing, while at the same time
improving the phase noise of the 100 MHz oscillator,
especially at close in offsets.
Below, shows another
standard we supplied, this time with a 75 MHz output.
Here we locked a 75 MHz oscillator to a 10 MHz ULN
reference. The customers specification is shown by
the yellow line. We easily beat this
specifications as shown by the white trace. And,
in fact, the plot below is of two of these oscillators.
So the individual phase noise is up to 3 dB better than
This isn't the best that we can do, simply we met the
customers specification goals. It's very important
not to ask for more than you need. Low phase noise
is a very expensive hobby!
100 MHz Oscillator
Our latest design is for a 100 MHz oscillator. The
customer has a limited budget and has asked for the
following phase noise. The table also shows what we
currently have offered and what may be possible.
100 MHz Oscillator Design
Phase Noise dBc/Hz
Our Offer so far
Theoretical Best Achievable
In the "Our offer so
far" line, we lock a 100 MHz oscillator to a 10 MHz ULN
oscillator in a normal analog phase lock loop.
The "theoretical best
achievable" is a complicated combination of digital
phase lock loops and multiple oscillators.
Currently, we meet the customers specification except
for the 1 Hz phase noise. However, we have already
exceeded his budget with this first offer.
theoretical figures meet the customers entire
specifications, but at five to ten times the customers
budget! This design is only for a quantity of one,
and as it is a special design, costs to add up.
something has to give, either the phase noise
requirement or the budget.
above is a typical scenario and often a design is a
compromise between what the customer wants and what can
be achieved, within the budget.
Multiple Outputs Often Required
Usually the customer wants multiple outputs of the ULN
signal. This involves a distribution amplifier to
isolate the required outputs and protect the loading on
the main oscillator's output.
Obviously the distribution amplifier must have ultra low
phase noise itself, otherwise the signal will be
Luckily we have developed our
DA1-100-10 range. This
is a distribution amplifier offering multiple outputs
(up to 20 in a 1U rack size) each with excellent
isolation from the other outputs (-90 dB typical) and a
large reverse isolation figure (typically 130 dB) to
protect the main oscillators output.
plot below shows our DA1-100-10's phase noise. It
can be seen the close in noise at an 1 Hz offset is 10
to 20 dB better than most ULN oscillators. The far
out noise is about -170 dBc, again more than enough to
meet the requirements of most projects.
phase noise below is our standard product. It is
possible to drop the 1 Hz noise to -140 dBc/Hz and the
far out noise to -175 dBc/Hz if special attention is
paid to gains, output levels etc.